GX3500 - 150 MHz FLEX Digital IO FPGA PXI Card

150MHz FLEX Digital I/O FPGA Card

3U FPGA Flex DIO Board
  • User configurable, on-board Altera Cyclone III FPGA device
  • Module software is fully compatible with Altera object files
  • No proprietary FPGA design tools required
  • Compatible with Altera’s free web-based Quartus II design tools
  • 160 digital I/O signals available for application support
  • Accommodates standard and custom expansion boards
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The GX3500 is a user configurable 3U FPGA PXI card which offers 160 digital I/O signals for specific application needs. The card employs the Altera Cyclone III FPGA which can support clock rates up to 150 MHz and features over 55,000 logic elements and 2.34 Mb of memory. The 3U PXI FPGA card GX3500 can also accept an expansion card assembly which can be used to customize the interface to the UUT – eliminating the need for additional external boards which are cumbersome and physically difficult to integrate into a test system. The design of the FPGA is done by using Altera’s free Quartus II Web Edition tool set. Once the user has compiled the FPGA design, the image can be loaded into the FPGA via the PXI bus interface or via an on-board EEROM.


The GX3500’s four banks of 40 digital I/O signals can be selectively isolated from the I/O connectors under software control. The signals are 5 V tolerant. Logic families supported by the I/O interface include LVTTL and LVCMOS. The FPGA device supports up to four phase lock loops for clock synthesis, clock generation and for support of the I/O interface. An on-board 80 MHz oscillator is available for use with the FGPA device or alternatively, the PXI 10 MHz clock can be used as a clock reference by the FPGA.

The FPGA has access to all of the PXI bus resources including the PXI 10 MHz clock, the local bus, and the PXI triggers, allowing the user to create a custom instrument which incorporates all of the PXIbus’ resources. Control and access to the FPGA is provided via the GX3500’s driver (GxFPGA) which includes tools for downloading the compiled FPGA code as well as providing register read and write functionality.

The GX3500 can be configured with several different standard expansion boards – providing buffered I/O interfaces for TTL, LVDS, differential TTL and ECL logic families. Additionally, the GX3500 can be configured with a video generator board which supports VGA, PAL ,and NTSC interfaces.

Programming and Software

The board is supplied with the GXFPGA library, a software package that includes a virtual instrument panel, and a Windows 32/64-bit DLL driver library and documentation. The virtual panel can be used to interactively program and control the instrument from a window that displays the instrument’s current settings and status. In addition, interface files are provided to support access to programming tools and languages such as ATEasy, LabView, LabView/Real-Time, C/C++, Microsoft Visual Basic®, Delphi, and Pascal. An On-Line help file and PDF User’s Guide provides documentation that includes instructions for installing, using and programming the board.
A separate software package - GtLinux - provides support for Linux 32/64 operating systems.


  • Automatic Test Equipment (ATE)
  • Semiconductor test
  • Custom interface emulation
  • Custom instrumentation



GX3500 3U FPGA Flex DIO Board
 I/O Module
GX3501 FPGA Flex Daughtercard: 80 Channel TTL Buffer
GX3509 FPGA Flex Daughtercard: 80 Channel Differential TTL
GX3510 FPGA Flex Daughtercard: 80 Channel Differential mLVDS
GX3540 FPGA Flex Daughtercard: 40 Channel MECL
GT95015 Connector Interface for all 5xxx/35xx, SCSI to 100 Mil Grid, differential




Digital I/O Channels
Logic Families LVTTL and LVCMOS, 5 V compatible
Output Current ±4.0 mA
Input Leakage Current ±10 µA
Power on State Default is disconnect at power on or user programmable via jumpers
Number of Channels 4 banks of 40 I/O signals.
Direction is configurable on a per pin basis
Disconnect on a per bank basis
Protection Overvoltage: -0.5 V to 7.0 V (input)
Short circuit: up to 8 outputs may be shorted at a time
Connector (4) SCSI  III, VHDCI type, 68 pin female
Expansion Board Interface
Board ID 4 bits
Digital I/O 160, each bank of 40 can be configured to bypass or access the expansion board
FPGA Flex I/O 4 signals
Master Clear From PXI interface
Power ±12 V, +5 V, +3.3 V, +2.5 V, +1.2 V
Timing Sources
PXI Bus 10 MHz
Internal 80 MHz oscillator, ±20 ppm
PCI Clock 33 MHz
FPGA Type Altera Cyclone III, EP3C55 F484
Number of PLLs Four
Logic Elements 55,856
Internal Memory 2.34 Mb
Power (No Expansion Board)
3.3 VDC 400 mA (typ); 1 A (max)
5 VDC 300 mA (typ); 1.2 A (max)
12 VDC
(For Expansion Board)
1 A (max)
Operating Temperature 0 °C to +50 °C
Storage Temperature -20 °C to +70 °C
Size 3U PXI
Weight 200 g


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